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Overview
Arrive Technologies specializes in high capacity devices that
enable the transition between the existing legacy PDH and
SONET/SDH networks and the emerging Etherent/MPLS/IP based
networks. PDH and SONET/SDH will remain as the backbone of the
layer one transport for many years due to the 10's of millions
of circuits now installed. Over time, other Ethernet layer one
technologies will begin deployment and for many years the
network will be a mix of PDH, SONET/SDH and Ethernet at layer
one. In order to allow carriers to offer layer 2 and above based
services on any installed layer one transport, Arrive is
developing a family of MSADMs, Mappers, Multi-protocol
Processors and Carrier Ethernet interworking devices such as
high capacity Circuit Emulation Engines and Ethernet Packet Flow
and Traffic Management Engines. These devices when combined in
various ways will permit almost any service to be carried over
any layer one transport seamlessly and transparent to the end
user. The first seven devices intended to satisfy this network
transition strategy are briefly described below.
AT4848 OC-48/STM-16 Multi-Service ADM
The AT4848 is a highly
integrated OC-48/STM-16 or OC-12/STM-4 Multiservice Add/Drop Multiplexer (ADM)
on a chip. The device can be used in a variety of next generation data over
SONET/SDH systems including Multiservice Provisioning Platforms (MSPP),
broadband access and enterprise customer premise equipment with an integrated
ADM. The AT4848 has integrated cross-connects supporting DS0, VT/TU and STS/VC
level switching. The device includes MACs and framers for a range of drop side
interfaces including Fast Ethernet, Gigabit Ethernet, storage and video
protocols, SONET/SDH and high density DS1/E1s and DS3/E3s. The AT4848 supports
Frame and Transparent GFP mapping, SONET/SDH HI/LO and PDH virtual concatenation
(VCAT) and LCAS with 128 groups. The AT4848 provides VLAN/MPLS
applications with on-chip L2 Aggregation & Management. An OIF SPI
interface is available for expansion through an external network processor,
additional Ethernet or additional RPR MAC.
Download Short Data Sheet
AT1212 OC-12/STM-4 Multi-Service ADM
The AT1212
is a highly integrated OC-12/STM-4
Multiservice Add/Drop Multiplexer on a chip. The AT1212 has
integrated cross-connects supporting DS0, VT/TU/TU3 and STS/VC
level switching. The AT1212 provides a multi-format and
multi-rate Ethernet and common legacy data over PDH, PDH mapped
to SONET/SDH or direct SONET mapping. On the PDH side, the chip
provides a parallel multiplexed PDH bus carrying 3 DS3s or 3 E3s
or 84 DS1s or 63 E1s or any mixture of them. The 84/63 DS1/E1s
signals can be accessed directly via the PDH bus or be
multiplexed to 3 channelized DS3/E3s via 3 embedded M13/E13
engines or mapped to SONET/SDH. The chip supports a dual
OC-12/STM-4 SONET/SDH interface with 1+1 or UPSR/SNCP hardware
controlled protection. On the Ethernet side, the chip provides 8
Fast Ethernets via a SMII/SS-SMII bus and 2 Gigabit Ethernet
ports with on-chip CDRs. It also supports an OIF SPI-3 bus to
support external devices such as a Network Processor to provide
extended L2+ or L3 level processing or expansion of the Ethernet
ports. The AT1212 supports ATM, GFP-T/F, HDLC, PPP and LAPS
encapsulation. A Traffic Aggregation and Management at Layer 2
for VLAN/MPLS with Classifying, Policing, Queuing, Shaping, and
Scheduling is provided. It provides direct SONET/SDH mapping,
SONET/SDH/PDH virtual concatenation (VCAT) and LCAS with 128
groups in accordance with G.7041, G.8040, G.7042 and G.7043. A
serial port is provided for ESCON, DVB-ASI or low speed Fiber
Channel SAN applications.
Download Short
Data Sheet
AT4825 OC-48/STM-16 Multi-Service ADM Lite
The AT4825
Hyperion is a highly integrated OC-48/STM-16
or OC-12/STM-4 Multiservice Add/Drop Multiplexer on a chip. The
AT4825 has integrated cross-connects supporting DS0, VT/TU/TU3
and STS/VC level switching. The AT4825 provides a multi-format
and multi-rate Ethernet and common legacy data over PDH, PDH
mapped to SONET/SDH or direct SONET mapping via a SPI-3
interface. On the PDH side, the chip provides a parallel
multiplexed PDH bus carrying 6 DS3s or 6 E3s or 168 DS1s or 126
E1s or any mixture of them. The 168/126 DS1/E1s signals can be
accessed directly via the PDH bus or be multiplexed to 6
channelized DS3/E3s via 6 embedded M13/E13 engines or mapped to
SONET/SDH. The chip supports four OC-48/12 or STM-16/4 SONET/SDH
interface with linear 1+1 or UPSR/SNCP hardware managed
protection. It supports an OIF SPI-3 bus to support external
devices such as a Network Processor to provide extended L2+ or
L3 level processing or direct Ethernet ports. The AT4825
supports ATM, GFP-T/F, HDLC, PPP and LAPS encapsulation. It
provides direct SONET/SDH mapping, SONET/SDH/PDH virtual
concatenation (VCAT) and LCAS with 128 groups in accordance with
G.7041, G.8040, G.7042 and G.7043.
Download Short
Data Sheet
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